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具電磁干擾效應衰減之全數位為展頻時脈產生電路及其控制方法 「All-digital spread spectrum clock generating circuit with emi reduction effect and a method for controlling the same」

專利國別: 美國  瀏覽人次: 11  發表日期: 2016-12-07 15:23:38  最後修改: 2017-11-17 09:35:21

項目 內容
本校案號 P101024A
發明人 鍾菁哲、何威達
所屬院 工學院
所屬系所 資訊工程學系所
類型 發明
申請號 13/863,520
申請日期 2013-04-22
公開號 9,450,641
公開日期 2014-06-26
證書號 US9,450,641B2
核准日期 2016-09-20
國際分類號 H04B 1/7097 20060101 H04B001/7097
專利權期間 2013.04.16~2033.04.16 (延長415天至2034.06.05)
專利摘要 An all-digital spread spectrum clock generating circuit with EMI reduction effect and a method for controlling the same utilize a digital spread-spectrum clock controlling unit to control a digital controlled oscillator, so that it can directly modulates an output clock frequency. Accordingly, the spectrum of the output clock frequency is spread, and the EMI effect due to the output clock signal is reduced. A spread-spectrum clock controller receives a reference clock counting signal and a dividing clock counting signal generated by a frequency detecting unit. After detecting and judging, the spread-spectrum clock controlling unit modulates and maintains a central frequency of the spread-spectrum clock periodically according to the two counting signals, thereby keeping a stability of the central frequency of the spread-spectrum clock signal and decreasing the complexity of the circuit design.
專利權人 國立中正大學

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