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專利國別 |
美國 |
發表日期 |
2012-06-22 10:05:43 |
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本校案號 |
P98042A |
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專利名稱 |
用於內容可定址記憶體之雙埠AND型比對型電路「DUAL-PORTED AND-TYPE MATCH-LINE CIRCUIT FOR CONTENT-ADDRESSABLE MEMORIES」 |
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發明人 |
王朝慶、鄭傑仁、王進賢、陳添福 |
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所屬院 |
工學院 |
提案單位 |
晶片系統研究中心 |
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類型 |
發明 |
專利權人 |
國立中正大學 |
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申請號 |
11/907,524 |
申請日期 |
2007-10-12 |
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公開號 |
0 |
公開日期 |
2009-04-16 |
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證書號 |
US 7,667,993 B2 |
核准日期 |
2010-02-23 |
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國際分類號 |
G11C-015/00(2006.01) |
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專利權期間 |
2007.10.12~2027.10.12(延長73天至2027.12.24) |
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專利摘要 |
A dual-ported AND-type match-line circuit includes at least one dual-ported dynamic AND gate. The dual-ported dynamic AND gate includes a group of CAM cells and a dual-ported dynamic circuit. A group of CAM cells connected to a dual-ported dynamic circuit and to the GND. The dual-ported dynamic circuit is connected to a group of CAM cells. The dual-ported dynamic circuit includes a srtting circuit, a first directing circuit, a second directing circuit, a first AND dynamic output circuit and a second AND dynamic output circuit. |
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圖示 |
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