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專利國別 |
美國 |
發表日期 |
2016-12-07 15:23:38 |
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本校案號 |
P101024A |
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專利名稱 |
具電磁干擾效應衰減之全數位位展頻時脈產生電路及其控制方法「ALL-DIGITAL SPREAD SPECTRUM CLOCK GENERATING CIRCUIT WITH EMI REDUCTION EFFECT AND A METHOD FOR CONTROLLING THE SAME」 |
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發明人 |
鍾菁哲、何威達 |
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所屬院 |
工學院 |
提案單位 |
資訊工程學系暨研究所 |
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類型 |
發明 |
專利權人 |
國立中正大學 |
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申請號 |
13/863,520 |
申請日期 |
2013-04-16 |
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公開號 |
US 2014-0177681 A1 |
公開日期 |
2014-06-26 |
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證書號 |
US 9,450,641 B2 |
核准日期 |
2016-09-20 |
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國際分類號 |
G06F-001/08(2006.01);H04B-001/69(2011.01);H04B-001/7097(2011.01) |
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專利權期間 |
2013.04.16~2033.04.16(延長415天至2034.06.05) |
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專利摘要 |
An all-digital spread spectrum clock generating circuit with EMI reduction effect and a method for controlling the same utilize a digital spread-spectrum clock controlling unit to control a digital controlled oscillator, so that it can directly modulates an output clock frequency. Accordingly, the spectrum of the output clock frequency is spread, and the EMI effect due to the output clock signal is reduced. A spread-spectrum clock controller receives a reference clock counting signal and a dividing clock counting signal generated by a frequency detecting unit. After detecting and judging, the spread-spectrum clock controlling unit modulates and maintains a central frequency of the spread-spectrum clock periodically according to the two counting signals, thereby keeping a stability of the central frequency of the spread-spectrum clock signal and decreasing the complexity of the circuit design. |
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圖示 |
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