【專利核准公告】P94001A-一種具有輔助計算單元的算術及邏輯裝置「ALU WITH AUXILIARY UNITS FOR PRE AND POST PROCESSING OF OPERANDS AND IMMEDIATE VALUE WITHIN SAME INSTRUCTION CYCLE」(已終止維護)
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專利國別 |
美國 |
發表日期 |
2012-06-22 09:55:24 |
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本校案號 |
P94001A |
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專利名稱 |
一種具有輔助計算單元的算術及邏輯裝置「ALU WITH AUXILIARY UNITS FOR PRE AND POST PROCESSING OF OPERANDS AND IMMEDIATE VALUE WITHIN SAME INSTRUCTION CYCLE」 |
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發明人 |
陳添福、康智恆、文啟能 |
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所屬院 |
工學院 |
提案單位 |
晶片系統研究中心 |
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類型 |
發明 |
專利權人 |
國立中正大學 |
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申請號 |
11/246,734 |
申請日期 |
2005-10-08 |
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公開號 |
0 |
公開日期 |
2007-04-12 |
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證書號 |
US 7,346,761 B2 |
核准日期 |
2008-03-18 |
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國際分類號 |
G06F-009/302(2006.01) |
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專利權期間 |
2005.10.08~2025.10.08(延長238天至2026.06.03) |
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專利摘要 |
An arithmetic and logic device as an integral part of a processing unit is provided to achieve code size and overhead reduction. The arithmetic and logic device contains several auxiliary computing units, each of which is capable of simple arithmetic and logical operation, under the control of a control unit. By configuring the auxiliary computing units along the data path, additional processing to the operands could be carried out within the same instruction cycle. As such, a processing unit incorporating such an arithmetic and logic device is able to achieve significant performance improvement both in terms of code size and memory access overhead. |
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圖示 |
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