專利國別

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發表日期

2014-10-14 10:30:34

本校案號

P101030A

專利名稱

產生中心對稱之晶片佈局的擺置及繞現方法「METHOD OF COMMON-CENTROID IC LAYOUT GENERATION」

發明人

林柏宏、何羿婷、蕭偉豪

所屬院

工學院

提案單位

電機工程學系暨研究所

類型

發明

專利權人

國立中正大學

申請號

13/919,548

申請日期

2013-06-17

公開號

公開日期

證書號

US 8,751,995 B2

核准日期

2014-06-10

國際分類號

G06F-017/50(2006.01)

專利權期間

2013.06.17~2033.06.17

專利摘要

A method of common-centroid IC layout generation includes the following steps of acquiring a netlist of one circuit-element set; summing up the numbers of the unit element of all elements of the circuit-element set to get the total number of the unit elements and then determine the unit element array, the aspect ratio of which is closest to 1, via a combination operation; generating multiple common-centroid placements according to the unit element array and applying global routing assignment to each of the common-centroid placements; proceeding with cost evaluation in such a way that a cost calculation is applied to each of the common-centroid placements to get a corresponsive value; and comparing all of the common-centroid placements according to the values got from the cost evaluation and selecting the common-centroid placement corresponding to one of the values according to a predetermined condition for detailed routing.

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